The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Apr. 28, 2023
Applicant:

Macom Technology Solutions Holdings, Inc., Lowell, MA (US);

Inventors:

Debdas Pal, Acton, MA (US);

Parshant Kumar, Stoneham, MA (US);

Stephen Bilotta, Brookline, NH (US);

Timothy E. Boles, Tyngsboro, MA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 10/80 (2025.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H10D 10/80 (2025.01); H10D 62/106 (2025.01);
Abstract

The reduction of feedback capacitance in active semiconductor devices, such as the reduction in collector to base capacitance in transistors, is described. In one example, a transistor includes a substrate, an active region of the transistor in the substrate, a dielectric layer over a top surface of the substrate, and an interconnect region. The active region includes a base contact over the active region. The interconnect region includes a conductive interconnect that extends over the dielectric layer and is electrically coupled with the base contact. The interconnect region also includes a semiconductor junction region extending under the conductive interconnect in an area of the substrate outside of the active region. The addition of the semiconductor junction region under the conductive interconnect reduces the total collector to base capacitance in the transistor.


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