The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12563733 B1

Date of Patent:

Feb. 24, 2026

Filed:

Mar. 16, 2023

Semiconductor memory device having lower contact passing through second stairs portion of stacked body

Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Ryotaro Yamamoto, Yokkaichi Mie, JP;

Kojiro Shimizu, Mie Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:

Foley & Lardner LLP

Primary Examiner:

Michael Jung

Int. Cl.

CPC ...

H10B 43/27 (2023.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10B 43/10 (2023.01); H10B 43/35 (2023.01);

U.S. Cl.

CPC ...

H10B 43/27 (2023.02); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 43/10 (2023.02); H10B 43/35 (2023.02);

Abstract

According to one embodiment, a semiconductor memory device includes a stacked body including a first stacked portion including lower conductive layers stacked in a first direction and including a first stairs portion having a first end portion stepwise processed, and a second stacked portion provided on an upper side of the first stacked portion and including upper conductive layers stacked in the first direction and including a second stairs portion located above the first stairs portion and having a second end portion stepwise processed, and a first lower contact passing through the second stairs portion and connected to a portion of a first lower conductive layer, the portion being included in the first stairs portion.

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