Memory device and a driving method of a sensing device included in the memory device

Abstract

A memory device including: a memory cell array including a first memory cell connected to a bit line, and a second memory cell connected to a complementary bit line; a bit line sense amplifier including a sensing bit line and a sensing complementary bit line; a first charge transfer transistor between the bit line and the sensing bit line; a second charge transfer transistor between the complementary bit line and the sensing complementary bit line; a first pre-charge transistor pre-charging the bit line and the complementary bit line with a first pre-charge voltage; a second pre-charge transistor pre-charging the sensing bit line and the sensing complementary bit line with a second pre-charge voltage; a first transfer gate transistor providing a first transfer gate voltage to the first charge transfer transistor; and a second transfer gate transistor providing a second transfer gate voltage to the second charge transfer transistor.