The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2026
Filed:
Dec. 23, 2022
Wenzhou University, Zhejiang, CN;
Pengjun Wang, Zhejiang, CN;
Jia Chen, Zhejiang, CN;
Yue Jun Zhang, Zhejiang, CN;
Gang Li, Zhejiang, CN;
Youyi Zhuang, Zhejiang, CN;
Wenzhou University, Zhejiang, CN;
Abstract
An SPUF based on combinational logic and scan chain comprises an external stimulus source, a combinational logic circuit module, a scan chain circuit module, a data processing module and n switch circuits SW, SW, . . . , SWn−, n=2m, and m is an integer greater than or equal to 1; combinational logic circuit module comprises n switch circuits S, S, . . . , Sn−and a combinational logic circuit; the scan chain circuit module comprises n scan flip-flops (SFFs) SFF, SFF, . . . , SFFn−; each of the n switch circuits SW, SW, . . . , SWn−and the n switch circuits S, S, . . . , Sn−is implemented by a 2-to-1 multiplexer. The SPUF based on combinational logic and scan chain has high uniqueness and randomness, requires a few clock frequency changes, and has high reliability, more bits of responses and high security.