The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Jun. 01, 2023
Applicant:

University of Florida Research Foundation, Incorporated, Gainesville, FL (US);

Inventors:

Swarup Bhunia, Gainesville, FL (US);

Aritra Dasgupta, Gainesville, FL (US);

Reiner Dizon, Gainesville, FL (US);

Aritra Bhattacharyay, Gainesville, FL (US);

Rasheed Almawzan, Gainesville, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/00 (2006.01); G06F 21/14 (2013.01); G06F 21/57 (2013.01);
U.S. Cl.
CPC ...
G06F 21/14 (2013.01); G06F 21/577 (2013.01); G06F 2221/033 (2013.01);
Abstract

Various embodiments of the present disclosure provide a multi-layered framework for security of integrated circuits. In one example, an embodiment provides for removing one or more routing tables in a Register Transfer Level (RTL) source code that models a design for an SoC via a hardware description language, comprising replacing the one or more routing tables in the RTL source code with respective programmable memory, transforming a state space of one or more embedded state machines in the RTL source code, transforming one or more portions of combinational logic in the RTL source code, and/or removing one or more portions of security-critical logic in the RTL source code, comprising replacing the one or more portions of security-critical logic in the RTL source code with respective lookup tables.


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