The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Jan. 17, 2023
Applicant:

Progranalog Corp., Portland, OR (US);

Inventors:

Roger Beeston, Camas, WA (US);

Christopher Poach, West Linn, OR (US);

David Baretich, Aurora, OR (US);

Assignee:

ProGrAnalog Corp., Portland, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2879 (2013.01);
Abstract

An electronic load testing system is configured to emulate aspects of an integrated circuit (IC). A control module of the system is configured to be electrically coupled to a first location on a printed circuit board (PCB) of an electronic assembly, and a load module is configured to be electrically coupled to a second location on the PCB. The load module includes a load cell configured to selectively conduct current from a power supply of the electronic assembly. The first location and the second location are spaced apart and in electronic communication via one or more traces of the PCB. The control module is configured to communicate with the load module via the one or more traces of the PCB. In some examples, the load module and the IC have an equivalent form factor, such that the load module can be installed in place of the IC.


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