The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2026

Filed:

Mar. 07, 2023
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Manish K. Shah, Austin, TX (US);

Paul Jordan, Austin, TX (US);

Maran Wilson, Palo Alto, CA (US);

Ravinder Kumar, Palo Alto, CA (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01); G06F 9/455 (2018.01); G06F 9/48 (2006.01); G06F 13/24 (2006.01);
U.S. Cl.
CPC ...
G06F 8/457 (2013.01); G06F 8/441 (2013.01); G06F 9/45558 (2013.01); G06F 9/4812 (2013.01); G06F 13/24 (2013.01); G06F 2009/45579 (2013.01); G06F 2009/45583 (2013.01); G06F 2009/45595 (2013.01); G06F 2213/0026 (2013.01);
Abstract

A system is presented that includes a communication link, a runtime processor, and a reconfigurable processor. The reconfigurable processor is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes first and second dies arranged in a package, having respective first and second arrays of coarse-grained reconfigurable (CGR) units, and respective first and second communication link interfaces coupled to the communication link. The runtime processor is adapted for configuring the first and second communication link interfaces to provide access to the first and second arrays of coarse-grained reconfigurable units from first and second physical function drivers and from at least one virtual function driver, and the reconfigurable processor is adapted for sending the interrupt to the first or to the second physical function driver and for sending the interrupt to a virtual function driver of the at least one virtual function driver.


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