The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2026
Filed:
Feb. 14, 2023
Applicant:
Nxp B.v., Eindhoven, NL;
Inventors:
Akhil Garg, Greater Noida, IN;
Sahil Jain, Ghaziabad, IN;
Abhishek Mahajan, Noida, IN;
Amit Jindal, Sonipat, IN;
Assignee:
NXP B.V., Eindhovent, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31704 (2013.01); G01R 31/31727 (2013.01); G01R 31/318541 (2013.01);
Abstract
A method for Design For Test (DFT) for Source Synchronous Interfaces (SSI) includes shifting a test vector into a master register slice with a DFT clock. A functional clock is generated. The test vector and the functional clock are launched from a first SSI of the master register slice. The test vector and the functional clock are captured with a second SSI of a slave. The test vector is shifted out of the slave with the DFT clock.
Quick Actions:
Garg, Akhil. (2026). Test for source synchronous interfaces (U.S. Patent No. 12553942). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12553942
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile