The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12550655 B1

Date of Patent:

Feb. 10, 2026

Filed:

Aug. 24, 2022

Method for manufacturing semiconductor device and semiconductor device

Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Takanobu Ono, Kuwana Mie, JP;

Masaki Sekine, Mie Mie, JP;

Kizashi Tanioka, Yokkaichi Mie, JP;

Takaaki Akahane, Inabe Mie, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:

Foley & Lardner LLP

Primary Examiner:

Mohammad M Choudhry

Int. Cl.

CPC ...

H10B 43/20 (2023.01); H01L 21/304 (2006.01); H01L 21/78 (2006.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);

U.S. Cl.

CPC ...

H01L 21/78 (2013.01); H01L 21/3043 (2013.01); H10B 43/20 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02);

Abstract

A method for manufacturing a semiconductor device includes forming a first stacked body having a plurality of first material films and a plurality of second material films that are alternately stacked, in a divided region of a semiconductor wafer including a chip region in which a semiconductor element is provided and the divided region between the adjacent chip regions, a plurality of times in a normal line direction of a substrate surface of the semiconductor wafer. The semiconductor wafer is fragmented by a blade having a width wider than the width of the first stacked body.

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