The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Jun. 05, 2023
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Nicolas Louis Breil, San Jose, CA (US);

Lisa Mcgill, Hillsboro, OR (US);

Amritha Rammohan, Santa Clara, CA (US);

Shashank Sharma, Fremont, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/03 (2025.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H10D 84/01 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H01L 21/02063 (2013.01); H01L 21/28518 (2013.01); H01L 21/76805 (2013.01); H01L 21/76814 (2013.01); H01L 21/76843 (2013.01); H01L 21/76889 (2013.01); H01L 21/76895 (2013.01); H10D 84/0186 (2025.01);
Abstract

A method of forming an electrical contact in a semiconductor structure includes performing a patterning process to form a mask on a semiconductor structure, the semiconductor structure comprising a first semiconductor region, a second semiconductor region, a dielectric layer having a first opening over the first semiconductor region and a second opening over the second semiconductor region, wherein the mask covers an exposed surface of the second semiconductor region within the second opening, performing an amorphization ion implant process to amorphize an exposed surface of the first semiconductor region within the first opening, performing a removal process to remove the mask, performing a selective epitaxial deposition process, to epitaxially form a contact layer on the exposed surface of the second semiconductor region, and performing a recrystallization anneal process to recrystallize the amorphized surface of the first semiconductor region.


Find Patent Forward Citations

Breil, Nicolas. (2026). Contact formation process for cmos devices (U.S. Patent No. 12550416). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12550416

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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