The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Sep. 11, 2024
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Kazutaka Takizawa, Yokohama Kanagawa, JP;

Yuki Kamijo, Yokohama Kanagawa, JP;

Takehiko Amaki, Yokohama Kanagawa, JP;

Shohei Asami, Yokohama Kanagawa, JP;

Shunichi Igahara, Fujisawa Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01);
Abstract

A memory system according to one embodiment includes a memory device and a memory controller. The memory device includes memory cells. The memory controller executes a tracking operation. In the tracking operation, the memory controller is configured to cause the memory device to execute a plurality of times of read operations using a plurality of read levels. In the tracking operation, the memory controller is further configured to set a first voltage difference between two adjacent read levels of the read levels in a fourth voltage range lower than a first voltage in a third voltage range and a second voltage difference between two adjacent read levels of the read levels in a fifth voltage range higher than the first voltage in the third voltage range. The first and second voltage differences are different from each other.


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