The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2026
Filed:
Oct. 30, 2024
Apple Inc., Cupertino, CA (US);
Gihoon Choo, San Jose, CA (US);
Tsung-Ting Tsai, San Jose, CA (US);
Shyuan Yang, San Jose, CA (US);
Abbas Jamshidi Roudbari, Saratoga, CA (US);
Chin-Wei Lin, San Jose, CA (US);
Mao-Hsun Cheng, San Diego, CA (US);
Salman Kabir, Campbell, CA (US);
Ting-Kuo Chang, San Jose, CA (US);
Warren S Rieutort-Louis, Cupertino, CA (US);
Yuchi Che, Santa Clara, CA (US);
Qing Li, Saratoga, CA (US);
Cheng-Chih Hsieh, Santa Clara, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
A display may include an array of pixels that receive row control signals from gate driver circuitry. The gate driver circuitry can include a chain of gate drivers configured to receive one or more clock signals. The gate driver circuitry can further include inverters configured to invert the one or more clock signals to generate inverted clock signals. The clock signals and the inverted clock signals can be conveyed to the chain of gate drivers. Falling edges of the clock signals and the inverted clock signals can be used to trigger assertions and deassertions of the row control signals. Operated in this way, the power consumption of the gate driver circuitry can be reduced.