The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Oct. 03, 2022
Applicant:

Magnolia White Corporation, Tokyo, JP;

Inventors:

Hajime Watakabe, Tokyo, JP;

Masashi Tsubuku, Tokyo, JP;

Kentaro Miura, Tokyo, JP;

Akihiro Hanada, Tokyo, JP;

Takaya Tamaru, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H01L 21/266 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01); H01L 21/426 (2006.01); H01L 21/4757 (2006.01); H10D 30/01 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6713 (2025.01); H01L 21/266 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/32135 (2013.01); H01L 21/32139 (2013.01); H01L 21/426 (2013.01); H01L 21/47573 (2013.01); H10D 30/0314 (2025.01); H10D 30/0321 (2025.01); H10D 30/6723 (2025.01); H10D 30/6729 (2025.01); H10D 30/6731 (2025.01); H10D 30/6745 (2025.01); H10D 30/6755 (2025.01); H10D 99/00 (2025.01);
Abstract

According to one embodiment, a semiconductor device includes a semiconductor layer including a source area, a drain area and a channel area, a first insulating layer, an etching stopper layer located immediately above the channel area and being thinner than the first insulating layer, a second insulating layer provided on the etching stopper layer and being thicker than the first insulating layer, a gate electrode, a third insulating layer which covers the etching stopper layer, the second insulating layer and the gate electrode and covers the first insulating layer immediately above the source area and immediately above the drain area, a source electrode in contact with the source area, and a drain electrode in contact with the drain area.


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