The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Feb. 29, 2024
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Takaya Yamamoto, Taito Tokyo, JP;

Shinsuke Fujii, Fujisawa Kanagawa, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 27/01 (2006.01);
U.S. Cl.
CPC ...
H04L 27/01 (2013.01);
Abstract

A receiver circuit includes an equalizer configured to process a received signal; a first offset circuit configured to apply a first offset voltage to the processed signal, the first offset voltage having a first polarity; a second offset circuit configured to apply a second offset voltage to the processed signal, the second offset voltage having a second polarity opposite to the first polarity; a first amplification circuit configured to amplify a first output signal provided by the first offset circuit; a second amplification circuit configured to amplify a second output signal provided by the second offset circuit; and a third amplification circuit configured to amplify the processed signal.


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Yamamoto, Takaya. (2026). Receiver circuit and method (U.S. Patent No. 12537729). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12537729

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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