The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2026
Filed:
Apr. 21, 2023
Dfxnoc—a multi-protocol, multi-cast, and multi-root network-on-chip with dynamic resource allocation
Xilinx, Inc., San Jose, CA (US);
Rambabu Nerukonda, Sunnyvale, CA (US);
Albert Shih-Huai Lin, Mountain View, CA (US);
Sreedhar Borra, Hyderabad, IN;
Rajat Chadha, San Jose, CA (US);
Amitava Majumdar, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Embodiments herein describe an integrated circuit (IC) device that includes a multi-protocol, multi-cast, and multi-root network-on-chip (NoC) with dynamic resource allocation (DFxNoC). A DFxNoC may include a plurality of end-points (EPs) that include functional circuitry, first and second root devices, and a bus network that includes multi-port switch circuits and a network of fixed links amongst the multi-port switch circuits, the root devices, and the EPs, where the root devices output respective first and second clocks, and where the multi-port switch circuits are dynamically configurable to route the first and second clocks to respective first and second selectable sets of one or more of the EPs over the network of fixed links.