Memory devices having built-in power supporting control circuits that provide increased program and read reliability

Abstract

A memory device includes an array of nonvolatile memory cells and a wordline voltage generator configured to drive: a selected word line within the array with a program voltage, a word line extending immediately adjacent the selected word line with a first voltage during the program operation, and an unselected word line within the array with a second voltage having a magnitude less than a magnitude of the first voltage, during a memory cell program operation. A control block is provided, which drives the wordline voltage generator with a first internal power signal having a first magnitude, in response to a first external supply power signal, drives the wordline voltage generator with a second internal power signal having a second magnitude less than the first magnitude, and selectively redirects power from the first external supply power signal to the second internal power signal, in response to detecting a reduction in current and/or voltage associated with the second external power signal that exceeds a threshold amount.