The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2026
Filed:
Mar. 10, 2022
Nvidia Corporation, Santa Clara, CA (US);
Timothy Guo, Santa Clara, CA (US);
Jack Choquette, Santa Clara, CA (US);
Shirish Gadre, Santa Clara, CA (US);
Olivier Giroux, Santa Clara, CA (US);
Harold Carter Edwards, Santa Clara, CA (US);
John Edmondson, Santa Clara, CA (US);
Manan Patel, Santa Clara, CA (US);
Raghavan Madhavan, Santa Clara, CA (US);
Jessie Huang, Santa Clara, CA (US);
Peter Nelson, Santa Clara, CA (US);
Ronny Krashinsky, Santa Clara, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
A new transaction barrier synchronization primitive enables executing threads and asynchronous transactions to synchronize across parallel processors. The asynchronous transactions may include transactions resulting from, for example, hardware data movement units such as direct memory units, etc. A hardware synchronization circuit may provide for the synchronization primitive to be stored in a cache memory so that barrier operations may be accelerated by the circuit. A new wait mechanism reduces software overhead associated with waiting on a barrier.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile