The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Jun. 20, 2024
Applicant:

Movellus Circuits Incorporated, Ann Arbor, MI (US);

Inventors:

Jeffrey Alan Fredenburg, Chicago, IL (US);

Mohammad Faisal, San Francisco, CA (US);

David Moore, Ann Arbor, MI (US);

Yu Huang, Ann Arbor, MI (US);

Assignee:

Movellus Circuits Inc., Ann Arbor, MI (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); H01L 25/065 (2023.01); H03L 7/00 (2006.01); H03L 7/081 (2006.01); H03L 7/083 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); H01L 25/0657 (2013.01); H03L 7/00 (2013.01); H03L 7/0816 (2013.01); H03L 7/0818 (2013.01); H03L 7/083 (2013.01); H03L 7/0991 (2013.01); H01L 2924/18161 (2013.01);
Abstract

An integrated circuit (IC) chip includes transmit circuitry comprising multiple transmitters to launch multiple sets of signals on-chip in a phase-aligned relationship to on-chip clocked-device circuitry. A first signaling path includes a first delay circuit to dynamically delay a first set of the multiple sets of signals by a first delay that is based on a phase difference between a reference clock and an as-received version of the first set of the multiple sets of signals fed back from the on-chip clocked-device circuitry. A second signaling path is disposed in parallel with the first signaling path and includes a second delay circuit to dynamically delay a second set of the multiple sets of signals by a second delay and is based on a phase difference between the reference clock and an as-received version of the second set of the multiple sets of signals fed back from the on-chip clocked-device circuitry.


Find Patent Forward Citations

Loading…