The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2026
Filed:
May. 11, 2023
Applicant:
Mitsubishi Electric Corporation, Tokyo, JP;
Inventors:
Assignee:
Mitsubishi Electric Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01); H01L 23/053 (2006.01); H01L 23/31 (2006.01); H01L 25/00 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 21/56 (2013.01); H01L 22/14 (2013.01); H01L 23/053 (2013.01); H01L 23/3135 (2013.01); H01L 23/49562 (2013.01); H01L 24/40 (2013.01); H01L 25/072 (2013.01); H01L 25/50 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/40139 (2013.01); H01L 2224/48175 (2013.01); H01L 2224/73221 (2013.01);
Abstract
An object is to provide a technique capable of reducing stress in the entire semiconductor device. The semiconductor device includes a plurality of sub-modules including a first sealing member, an insulating substrate provided with a first circuit pattern electrically connected to at least one of the conductive plates of the plurality of sub-modules, connection members electrically connected to at least one of the conductive pieces of the plurality of sub-modules, and a second sealing member having lower hardness than the first sealing member, which seals the plurality of sub-modules, the insulating substrate, and the connection members.