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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12532768 B1

PDFFull Text
Date of Patent:
Jan. 20, 2026

Filed:

Mar. 04, 2022

Electronic component having terminal formation area offset from mounting surface center and manufacturing method of same and of mounting board

Applicant:

Tdk Corporation, Tokyo, JP;

Inventors:

Atsushi Yoshino, Tokyo, JP;

Shuichi Takizawa, Tokyo, JP;

Yuki Okino, Tokyo, JP;

Hiromu Harada, Tokyo, JP;

Assignee:

TDK Corporation, Tokyo, JP;

Attorney:

Rimon P.C.

Primary Examiner:

Khiem D Nguyen

Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/09 (2013.01); H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 2224/03015 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/0913 (2013.01);
Abstract

Disclosed herein is an electronic component that includes a mounting surface having a terminal formation area and a plurality of terminal electrodes arranged in an array in the terminal formation area. The center point of the terminal formation area is offset with respect to the center point of the mounting surface. Thus, at mounting of the electronic component on a mounting substrate, a solder paste is supplied to a land pattern, and then the mounting is performed such that the center point of a mounting area and the center point of the mounting surface coincide with each other, whereby a predetermined displacement occurs between the planar positions of the land pattern and terminal electrode. This allows a void inside the solder to be released outside without involving a layout change of the land pattern.

Find Patent Forward Citations

Yoshino, Atsushi. (2026). Electronic component having terminal formation area offset from mounting surface center and manufacturing method of same and of mounting board (U.S. Patent No. 12532768). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12532768

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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