The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Jun. 29, 2022
Applicant:

Sumco Corporation, Tokyo, JP;

Inventors:

Mami Kubota, Tokyo, JP;

Ryosuke Takahashi, Tokyo, JP;

Sayaka Makise, Tokyo, JP;

Assignee:

SUMCO CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); G01N 13/02 (2006.01); H01L 21/306 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02052 (2013.01); G01N 13/02 (2013.01); G01N 2013/0208 (2013.01); H01L 21/306 (2013.01); H01L 21/67017 (2013.01); H01L 21/67253 (2013.01);
Abstract

This method of cleaning a semiconductor wafer can reliably reduce the LPD count on the wafer surface. The method includes a first step of measuring a contact angle of a surface of a semiconductor wafer under conditions in which a volume of a droplet dripped on the surface differs, a second step of calculating a ratio of change in a measured value of the contact angle to change in the volume of the droplet based on a relationship between the volume of the droplet and the measured value of the contact angle under the conditions, a third step of determining whether pretreatment is necessary for the semiconductor wafer surface based on the ratio, a fourth step of performing the pretreatment on the semiconductor wafer surface according to the determining in the third step, and a fifth step of subsequently performing single-wafer spin cleaning on the semiconductor wafer surface.


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