The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2026
Filed:
Aug. 28, 2024
Realtek Semiconductor Corporation, Hsinchu, TW;
Chun-Ching Chan, Hsinchu, TW;
Realtek Semiconductor Corporation, Hsinchu, TW;
Abstract
A PLL circuit includes a reference current generation circuit, a frequency calibration circuit, a magnification adjustment circuit, an oscillation circuit and a front-end circuit. The frequency calibration circuit generates a current adjustment signal according to a target frequency. The magnification adjustment circuit adjusts a reference current to a target frequency current according to the current adjustment signal. The oscillation circuit generates an output clock signal according to the target frequency current. The front-end circuit detects phase and frequency differences between the output clock signal and a reference clock signal to generate a first control signal. The oscillation circuit adjusts an output frequency to be the same as the target frequency based on the first control signal and the target frequency current. When the first control signal shifts, a second control signal is generated to adjust the target frequency current according to the reference current and the second control signal.