The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Feb. 12, 2024
Applicant:

Analog Devices, Inc., Wilmington, MA (US);

Inventor:

Rajasekhar Nagulapalli, Wilmington, MA (US);

Assignee:

Analog Devices, Inc., Wilmington, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/30 (2006.01); H03F 3/45 (2006.01); H03K 19/00 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 17/302 (2013.01); H03F 3/45183 (2013.01); H03F 3/45273 (2013.01); H03K 19/0005 (2013.01); H03K 19/018528 (2013.01); H03F 2200/261 (2013.01);
Abstract

High-swing push-pull assisted Voltage Mode Logic (VML) driver circuits can enhance output voltage amplitude to improve efficiency and performance in electronic applications. For example, this is accomplished by utilizing a primary current generator circuit that is powered by a supply voltage to generate a primary current. The primary current is provided, through a switching circuit, to an output node that, in response to an input signal, generates a first output voltage. Further, a supplementary current generator circuit is coupled to the switching circuit to generate a secondary current. The combination of the primary and secondary currents increases the amplitude of the first output voltage, thereby enabling the VML driver circuit to deliver enhanced performance, particularly in applications requiring precise voltage control and high efficiency.


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