The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2026
Filed:
Aug. 08, 2023
SK Hynix Inc., Gyeonggi-do, KR;
Dong Ho Kim, Gyeonggi-do, KR;
Tae Hun Park, Gyeonggi-do, KR;
Yeong Jo Mun, Gyeonggi-do, KR;
Dong Hun Kwak, Gyeonggi-do, KR;
SK hynix Inc., Gyeonggi-do, KR;
Abstract
The present technology relates to a page buffer performing memory operation. According to the present technology, a page buffer may include a bit line voltage control circuit, a latch and a reference voltage supply circuit. The bit line voltage control circuit may selectively connect a bit line and a sensing node. The latch may provide a latch signal corresponding to data and an inverted latch signal. The reference voltage supply circuit may include a first PMOS transistor and a first NMOS transistor coupled in series between the sensing node and a ground voltage terminal, and apply a first reference voltage to the sensing node. The first PMOS transistor may be controlled according to the reference voltage control signal. The first NMOS transistor may be controlled by the inverted latch signal.