The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Apr. 24, 2023
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventor:

Jack Fuller, Newbury, GB;

Assignee:

Cirrus Logic Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 21/85 (2013.01);
U.S. Cl.
CPC ...
G06F 13/16 (2013.01); G06F 21/85 (2013.01); G06F 2213/0016 (2013.01);
Abstract

In an example there is provided a configurable integrated circuit. The configurable integrated circuit comprises a configuration pin, configuration circuitry, and a controller. The configuration pin is for coupling with an external memory device. The configuration circuitry is to determine a resistance value between the configuration pin and a reference voltage. The controller configured to select a configuration mode for the integrated circuit based on the resistance value determined by the configuration circuitry. The configuration mode is one of an internal configuration mode in which the integrated circuit is configured based on data stored in the integrated circuit, and an external configuration mode in which the integrated circuit is configured based on data read from an external memory device coupled to the configuration pin.


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