The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2026
Filed:
May. 12, 2023
Seek Thermal, Inc., Goleta, CA (US);
Leonard Araki, Santa Barbara, CA (US);
Lars Mininni, Santa Barbara, CA (US);
William J. Parrish, Santa Barbara, CA (US);
Seek Thermal, Inc., Goleta, CA (US);
Abstract
Thermal cameras exist at price points and volume manufacturing suitable for practical consideration of integration of thermal camera modules into host electronic devices, including automobiles, PED's—smartphones, tablets, etc. However, individual thermal cameras require extensive unit-specific data to provision and operate each individual camera with acceptable performance. This along with non-standard electrical interfaces, are adoption barriers to host device manufacturers, for example, where some devices, including some PED's, have become bus-based platforms allowing for functional modules to be packaged into common PED's and operated by way of apps. Some modern PED's, for example, include standard high-speed data busses and low-speed control busses. Devices and methods are disclosed for delivering compatibility with standard internal interfaces and storing the camera module's unit-specific data in a memory element on the camera module. The data can be read out on the same data bus used for thermal camera image data, either by selection between stored data and video output or by simultaneous streaming on different virtual channels. In a particular embodiment the logic element may be configured to write per pixel runtime data such as bias voltages on a runtime per pixel basis to the FPA as the FPA operates by accessing the memory element from a starting point address, wherein the starting point address may be at least one of predetermined or set by a host controller, thereby allowing the FPA to operate without local processing resources or per pixel communication with the host controller.