The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Jan. 28, 2020
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventors:

Masaki Yamanaka, Sakai, JP;

Masahiko Miwa, Sakai, JP;

Takao Saitoh, Sakai, JP;

Yohsuke Kanzaki, Sakai, JP;

Yi Sun, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/80 (2023.01); H10K 59/131 (2023.01); H10K 59/35 (2023.01); H10K 59/65 (2023.01);
U.S. Cl.
CPC ...
H10K 59/80516 (2023.02); H10K 59/131 (2023.02); H10K 59/353 (2023.02); H10K 59/65 (2023.02); H10K 59/873 (2023.02); H10K 59/80518 (2023.02); H10K 59/8731 (2023.02);
Abstract

A display device includes: a display panel including: a base substrate; a thin film transistor layer provided on the base substrate and including a semiconductor layer, a gate insulation film, a plurality of first wiring lines, an interlayer insulation film, and a plurality of second wiring lines, all of which are stacked in a stated order; a light-emitting element layer provided on the thin film transistor layer; and a sealing film provided on the light-emitting element layer; and an image capturing unit provided on a base substrate side of the display area of the display panel, wherein in a plan view, the plurality of second wiring lines, in an area overlapping the image capturing unit, have portions respectively overlapping the plurality of first wiring lines.


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