The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Jun. 10, 2022
Applicant:

Suzhou Oriental Semiconductor Co., Ltd., Jiangsu, CN;

Inventors:

Lei Liu, Jiangsu, CN;

Wei Liu, Jiangsu, CN;

Yuanlin Yuan, Jiangsu, CN;

Rui Wang, Suzhou, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/66 (2025.01);
U.S. Cl.
CPC ...
H10D 62/111 (2025.01); H10D 30/668 (2025.01);
Abstract

A super junction semiconductor power device includes an n-type drain region, an n-type drift region, multiple p-type columns, and two gate trenches. The n-type drift region is located on the n-type drain region. The multiple p-type columns have the same width. The spacing between two adjacent p-type columns is the same. A first p-type body region is disposed on the top of each p-type column. The first p-type body region is provided with a first n-type source region. Two gate trenches are between two adjacent first p-type body regions. The spacing between the two gate trenches has at least two different spacing values. The widths of the two gate trenches between the two adjacent first p-type body regions are the same. Each gate trench is provided with a gate dielectric layer and a gate.


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