The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Mar. 08, 2023
Applicant:

Fuji Electric Co., Ltd., Kawasaki, JP;

Inventors:

Tsurugi Kondo, Hachioji, JP;

Katsunori Ueno, Matsumoto, JP;

Shinya Takashima, Hachioji, JP;

Ryo Tanaka, Hino, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H10D 30/66 (2025.01); H10D 62/17 (2025.01); H10D 62/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/668 (2025.01); H10D 62/393 (2025.01); H10D 62/8503 (2025.01);
Abstract

A nitride semiconductor device including: a gallium nitride substrate; and a vertical MOSFET provided on the gallium nitride substrate, the vertical MOSFET including: an N-type drift region provided in the gallium nitride substrate; a P-type well region provided in the drift region; an N-type source region provided in the well region; a gate insulating film provided on a surface of the well region; and a gate electrode provided on the surface of the well region via the gate insulating film, wherein the well region includes a first well region and a second well region higher in acceptor element concentration than the first well region, the second well region being located between the first well region and the gate insulating film and being in contact with the source region.


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