The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2026
Filed:
May. 10, 2024
Qualcomm Incorporated, San Diego, CA (US);
Burcin Serter Ergun, Poway, CA (US);
Julian Puscar, Holly Springs, NC (US);
Zhiqin Chen, San Diego, CA (US);
Russell Deans, Pittsboro, NC (US);
Jyotheeswara Reddy V, Pileru, IN;
QUALCOMM INCORPORATED, San Diego, CA (US);
Abstract
An apparatus, including: a phase locked loop (PLL) configured to generate a spread spectrum clock (SSC) clock signal where the SSC clock signal swings between a first frequency and a third frequency based on an SSC enable signal being asserted, or a non-SSC clock signal where the non-SSC clock signal is substantially constant at a second frequency based on the SSC enable signal being deasserted; and a control circuit configured to effectuate a first configuration change of the PLL in response to the SSC enable signal becoming deasserted, the first configuration change reducing a time interval between the SSC enable signal becoming deasserted and the non-SSC clock signal settling to substantially the second frequency.