The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Jan. 10, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Lei Sun, San Diego, CA (US);

Behnam Sedighi, La Jolla, CA (US);

Honghao Ji, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/00 (2006.01); H03K 17/56 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 17/56 (2013.01); H03K 19/20 (2013.01);
Abstract

Certain aspects of the present disclosure are directed towards an interleaved sampling circuit. The interleaved sampling circuit generally includes: a clock generator having an input coupled to a main clock node and having a plurality of non-overlapping clock output nodes; and a plurality of sampling circuits, each of the plurality of sampling circuits having a first clock input coupled to a respective one of the non-overlapping clock output nodes and a second clock input coupled to the main clock node.


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