The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Jul. 09, 2024
Applicants:

Magnolia Purple Corporation, Tokyo, JP;

Panasonic Intellectual Property Corporation of America, Torrance, CA (US);

Inventors:

Takahiro Ochiai, Chiba, JP;

Mitsuru Goto, Chiba, JP;

Hiroko Sehata, Sapporo, JP;

Hiroyuki Higashijima, Konosu, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G11C 19/28 (2013.01); G09G 3/3674 (2013.01); G09G 3/3677 (2013.01); G09G 3/3688 (2013.01); G09G 2300/0413 (2013.01); G09G 2300/0465 (2013.01); G09G 2310/0283 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01);
Abstract

A shift register circuit, including: a plurality of clock signal lines each supplying a plurality of clock pulses respectively; phases of the plurality of clock pulses are different from each other, and a plurality of cascade-connected register circuits including a top register circuit, a bottom register circuit, and main register circuits are provided between the top register circuit and the bottom register circuit. Each of the plurality of cascade-connected register circuits includes a set terminal, a reset terminal, a first node, a second node, a second node reset terminal, an output part, a second output part, a first node set part, a second node set part, a first node control part, and a second node control part.


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