The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 2026
Filed:
Nov. 17, 2022
Battelle Memorial Institute, Columbus, OH (US);
Adam Kimura, Lewis Center, OH (US);
Vince A. Mckinsey, Hilliard, OH (US);
Adam R. Waite, Centerville, OH (US);
BATTELLE MEMORIAL INSTITUTE, Columbus, OH (US);
Abstract
In an integrated circuit (IC) analysis, a reference IC layout is stored. Instructions are readable and executable by an electronic processor to perform an IC analysis method, including: receiving layer images of a physical IC; extracting polygons depicted in the layer images; detecting errors in the physical IC by applying homeomorphic error detection to compare the extracted polygons with polygons of the reference IC layout; and displaying the detected errors on the display. The detecting of errors may include detecting an error comprising a topological inequivalence between an extracted polygon or pair of polygons and a polygon or pair of polygons of the reference IC layout. The detecting of errors may include detecting an error comprising a topological coverage error.