Processor architecture and related techniques

Abstract

This disclosure provides techniques for permuting the performance of associative functions by circuitry of a digital device or processor in a manner that disrupts the effectiveness of side channel attacks. In specific embodiments, associative functions performed by math processing circuitry in such a device are permuted so as to mask/obfuscate a power signature and/or other externally-observable effects while providing an invariant result as an output. In still more detailed embodiments, a variable radix processor is used to provide conversion of an input operand to a permutation of associative functions. The radix can be varied across different products and/or can be dynamically varied during operation of a device, e.g., based on seeds from a random number generator. In still more detailed embodiments, conventional 'double-and-add' or “square-and-multiply” execution units can be variably scripted to mask power signature and/or other patterns.