The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Sep. 29, 2023
Applicant:

SK Hynix Nand Product Solutions Corp., Rancho Cordova, CA (US);

Inventors:

Chaohong Hu, San Jose, CA (US);

Ning Wu, Folsom, CA (US);

Cory Lappi, Rochester, MN (US);

Assignee:

SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01);
Abstract

This invention is directed to managing data storage in a memory system. The memory system receives a host request for an erase operation on a first erasable unit of a first memory block. In response to the host request, the memory system identifies an unused erasable unit of a second memory block in the memory system, remaps the first erasable unit of the first memory block to the unused erasable unit of the second memory block, and applies the erase operation on the unused erasable unit of the second memory block in place of the first erasable unit of the first memory block. In some embodiments, at a time of receiving the host request, the memory system further includes a space reserve of over-provisioning, and the second memory block is different from the space reserve. In some embodiments, the second memory block is moved offline to join the space reserve.


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