Semiconductor memory device and method for programming select transistors

Abstract

A semiconductor memory device, and a method of operation, includes a memory block including a plurality of memory strings. The semiconductor memory device also includes a peripheral circuit performing a main program operation on drain select transistors included in the memory block, and a test program operation and a threshold voltage monitoring operation on memory cells included in the memory block. The semiconductor memory device further includes control logic controlling the peripheral circuit to detect a disturb susceptible memory string, among the plurality of memory strings, based on a result of performing the threshold voltage monitoring operation on the memory cells, and to perform an additional program operation on a drain select transistor included in the disturb susceptible memory string.