The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Jan. 31, 2024
Applicant:

Avago Technologies International Sales Pte. Limited, Singapore, SG;

Inventors:

Michael Leary, Sunnyvale, CA (US);

Jeesu Kim, San Ramon, CA (US);

Li Sun, San Jose, CA (US);

Myung Soo Kang, Danville, CA (US);

Sarah Kay Haney, San Jose, CA (US);

Dong Hoon Choi, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01F 27/36 (2006.01); H01F 27/28 (2006.01); H01F 27/29 (2006.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01F 27/2804 (2013.01); H01F 27/292 (2013.01); H01F 27/36 (2013.01); H05K 1/0218 (2013.01); H05K 1/186 (2013.01); H01F 2027/2809 (2013.01); H05K 2201/1003 (2013.01);
Abstract

The subject technology is directed to systems and methods for integrating inductors within printed circuit boards. In an embodiment, the subject technology provides an apparatus that includes a substrate comprising a first layer and a first inductor coupled to the first layer. The first inductor includes a second layer comprising a first metal material and a third layer comprising a second metal material. The third layer is coupled to the second layer through a first interconnect. The first inductor may be embedded within the substrate to enable efficient space utilization, leading to overall miniaturization and improved performance due to shorter signal paths and reduced parasitic effects. There are other embodiments as well.


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