The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

May. 06, 2024
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Kyungho Kim, Yongin-si, KR;

Nahyeon Cha, Yongin-si, KR;

Sungyoon Hwang, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01);
U.S. Cl.
CPC ...
G09G 3/32 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/04 (2013.01); G09G 2330/021 (2013.01); G09G 2330/028 (2013.01); G09G 2340/0435 (2013.01);
Abstract

A gate driver includes a control circuit which controls a voltage of a first control node and a voltage of a second control node in response to an input signal, a first control clock signal, a the second control clock signal, a carry output circuit which generates a carry signal in response to voltages of the first control node and the second control node, an enable node control circuit controlling a voltage of an enable node in response to the carry signal, an enable signal, and an inverted enable signal, a masking circuit which controls a voltage of a first intermediate node in response to the voltage of the first control node, the carry signal, and the voltage of the enable node, and a gate output circuit which outputs a gate signal in response to the carry signal, the voltage of the first intermediate node, and an output clock signal.


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