The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Aug. 09, 2024
Applicant:

Murata Manufacturing Co., Ltd., Nagaokakyo, JP;

Inventor:

Robert Mark Englekirk, Littleton, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 13/40 (2013.01); G06F 11/3027 (2013.01); G06F 11/3062 (2013.01); G06F 2212/1028 (2013.01);
Abstract

Circuits and methods for defining functionality of swappable pins are provided. A power-on-reset (POR) circuit detects that a supply voltage is above a POR threshold during start-up or a reset operation. Transmission gate circuits monitor inputs from a first pin and the second pin and deactivate once the POR circuit detects that the supply voltage is above the POR threshold. A latch circuit receives outputs of the transmission gate circuits as inputs. Once the supply voltage is above the POR threshold, the latch circuit generates a first output corresponding to the first pin, and a second output corresponding to the second pin, where the first pin is defined as a I/O pin and the second pin is defined as a capacitance pin or vice versa based on the first output and the second output.


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