The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Sep. 30, 2022
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Yang Hu, Austin, TX (US);

Dejan Jovanovic, Brooklyn, NY (US);

Amit Goel, Portland, OR (US);

Neha Rungta, San Jose, CA (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/3668 (2025.01);
U.S. Cl.
CPC ...
G06F 11/3684 (2013.01); G06F 11/3688 (2013.01);
Abstract

Disclosed are systems and methods for adjusting the encoding/ordering of parts of a satisfiability modulo theories ('SMT') problem indicated in an SMT configuration and/or optimizing the SMT solver configuration of an SMT solver to reduce the processing time needed to process the SMT problem using the SMT solver. For example, the order of parts of an SMT problem may be rearranged to reduce a processing time of the SMT problem. Likewise, the configuration options selected for an SMT solver may be adjusted to reduce the processing time required to process an SMT problem.


Find Patent Forward Citations

Hu, Yang. (2026). Adjusting satisfiability modulo theories solver configurations (U.S. Patent No. 12517809). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12517809

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…