The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2026
Filed:
Jun. 26, 2024
Nvidia Corporation, Santa Clara, CA (US);
Srinivas Santosh Kumar Madugula, Visakhapatnam, IN;
Olivier Giroux, Santa Clara, CA (US);
Wishwesh Anil Gandhi, Sunnyvale, CA (US);
Michael Allen Parker, San Jose, CA (US);
Raghuram L, Bengaluru, IN;
Ivan Tanasic, San Francisco, CA (US);
Manan Patel, San Jose, CA (US);
Mark Hummel, Franklin, MA (US);
Alexander L. Minkin, Los Altos, CA (US);
Gregory Michael Thorson, Mequon, WI (US);
NVIDIA CORPORATION, Santa Clara, CA (US);
Abstract
Various embodiments include techniques for performing self-synchronizing remote memory operations in a data center or multiprocessor computing system. During a remote memory operation, a source processor transmits multiple data segments to a destination processor. For each data segment, the source processor transmits a remote memory operation to the destination processor that includes associated metadata that identifies the memory location of a corresponding synchronization object representing a count of data segments to be stored or a flag for each data segment to be stored. The remote memory operation along with the metadata is transmitted as a single unit to the destination processor. The destination processor splits the operation into the remote memory operation and the memory synchronization operation. As a result, the source processor avoids the need to perform a separate memory synchronization operation, thereby reducing inter-processor communications and increasing performance of remote memory operations.