The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Apr. 10, 2024
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Juri Giovannone, Cernobbio, IT;

Roberto Giorgio Bardelli, Fino Mornasco, IT;

Andrea Gambero, Santo Stefano Ticino, IT;

Alessio Corso, Paderno Dugnano, IT;

Donata Rosaria Maria Nicolosi, Catania, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); G04F 10/00 (2006.01); G06F 1/12 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G04F 10/005 (2013.01); G06F 1/12 (2013.01); H03K 5/00 (2013.01); H03K 2005/00013 (2013.01);
Abstract

The present invention relates to a system and a method for generating a plurality of control signals for multi-die applications. In particular, the invention relates to the generation of synchronized control signals generated by independent dies having an own local clock and provided with a common clock. In a first step, in each die, the period of the common clock signal is measured using a TDC. In further steps, in each die, a respective phase shift is evaluated and applied between the rising edge of the common clock signal and each of the rising edges of the output control signals, using delay unit.


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