The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Aug. 14, 2023
Applicant:

Marvell Asia Pte Ltd, Singapore, SG;

Inventors:

Quanli Lu, Coto de Caza, CA (US);

Liang Fan, Irvine, CA (US);

Afshin Mellati, Aliso Viejo, CA (US);

Espen Olsen, Tustin, CA (US);

Linghsiao Jerry Wang, Irvine, CA (US);

Cindra Abidin, Irvine, CA (US);

Assignee:

Marvell Asia Pte Ltd, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01);
Abstract

A first network device includes a pair of clock tree circuits, a feedback path, and a transceiver. The pair of clock tree circuits is configured to generate output clock signals, which are complementary to each other. The feedback path includes a skew detection circuit and a gain amplifier. The skew detection circuit detects a skew in the output clock signals and generates a pair of voltage signals based on a voltage-to-current and a current-to-voltage conversion of the output clock signals. The pair of voltage signals is indicative of the skew between the output clock signals. The gain amplifier amplifies the pair of voltage signals and, based on the amplified pair of voltage signals, adjusts respective delays in the output clock signals. The transceiver, based on the output clock signals, controls transfer of data to or from a second network device that is separate from the first network device.


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