The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Jun. 24, 2022
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventor:

Yu-Hao Ho, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/65 (2025.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/762 (2006.01); H10D 30/01 (2025.01); H10D 30/60 (2025.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/65 (2025.01); H01L 21/02236 (2013.01); H01L 21/02255 (2013.01); H01L 21/26513 (2013.01); H01L 21/266 (2013.01); H01L 21/76202 (2013.01); H10D 30/022 (2025.01); H10D 30/0221 (2025.01); H10D 30/0281 (2025.01); H10D 30/603 (2025.01); H10D 62/109 (2025.01); H10D 62/116 (2025.01); H10D 62/393 (2025.01); H10D 84/017 (2025.01); H10D 84/0191 (2025.01); H10D 84/038 (2025.01); H10D 84/85 (2025.01);
Abstract

A semiconductor device and a method for forming the same are provided. The semiconductor device includes a semiconductor substrate, a well region, an isolation structure, a gate structure and a field doped region. The well region having a first conductivity type is disposed in the semiconductor substrate. The gate structure extends to cover a portion of the isolation structure in the well region. The field doped region having a second conductivity type is disposed on the well region. The field doped region has a first portion overlapping the isolation structure and a second portion that is connected to the first portion and away from the gate structure. A first depth between a bottom surface of the first portion and a top surface of the semiconductor structure is greater than a second depth between a bottom surface of the second portion and the top surface of the semiconductor structure.


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