The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Jun. 22, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jinseo Choi, Suwon-si, KR;

Sohyang Lee, Suwon-si, KR;

Jeongmin Jin, Suwon-si, KR;

Sohee Choi, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/482 (2023.02); H10B 12/0335 (2023.02); H10B 12/50 (2023.02);
Abstract

A method of manufacturing an integrated circuit device includes forming, on a substrate, a plurality of bit line structures, which each include a bit line and an insulating capping pattern, and a plurality of contact plugs between the plurality of bit line structures, forming a plurality of recess contact plugs from the plurality of contact plugs and forming a plurality of recess spaces on the plurality of recess contact plugs, forming an engraved insulating pattern having openings, on the plurality of bit line structures and the plurality of recess contact plugs, forming a plurality of cut-off spaces by partially removing the insulating capping pattern of each bit line structure through the openings, and forming a plurality of conductive landing pads to respectively fill the plurality of recess spaces and the plurality of cut-off spaces and respectively contact upper surfaces of the plurality of recess contact plugs.


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