The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Dec. 28, 2023
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Anand Subramanian, Bangalore, IN;

Tanmay Halder, Bangalore, IN;

Deepa Nair J S, Bengaluru, IN;

Sreeja Chakingal, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01); H03K 19/0175 (2006.01); H03M 1/06 (2006.01); H03M 1/66 (2006.01); H03M 1/68 (2006.01);
U.S. Cl.
CPC ...
H03M 3/324 (2013.01); H03K 19/017545 (2013.01); H03M 1/0624 (2013.01); H03M 1/067 (2013.01); H03M 1/66 (2013.01); H03M 3/50 (2013.01); H03M 1/68 (2013.01); H03M 3/464 (2013.01);
Abstract

In a described example, a circuit includes a digital-to-analog converter (DAC) unit element switch circuit including first and second sign switch inputs, first and second select switch inputs, and first, second and third DAC outputs. Synchronizer logic includes a selection input and first and second synchronization outputs, in which the first synchronization output is coupled to the first select switch input and the second synchronization output is coupled to the second select switch input. Selection logic includes a data input, a sign control output and a selection control output, in which the sign control output is coupled to the first and second sign switch inputs, and the selection control output is coupled to the selection input.


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