The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Oct. 30, 2019
Applicant:

Google Llc, Mountain View, CA (US);

Inventors:

Sergio Boixo Castrillo, Rancho Palos Verdes, CA (US);

Vadim Smelyanskiy, Mountain View, CA (US);

Hartmut Neven, Malibu, CA (US);

Alexander Korotkov, Riverside, CA (US);

Assignee:

Google LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 10/70 (2022.01); G06N 10/20 (2022.01); G06N 10/40 (2022.01);
U.S. Cl.
CPC ...
G06N 10/70 (2022.01); G06N 10/20 (2022.01); G06N 10/40 (2022.01);
Abstract

Methods, systems and apparatus for estimating the fidelity of quantum logic gates. In one aspect, a method includes defining multiple sets of random quantum circuits; for each set of random quantum circuits: selecting an observable for each element in the set of random quantum circuits, wherein each selected observable corresponds to a respective element of the set of random quantum circuits and is dependent on the element to which it corresponds; estimating a value of a polarization parameter for the set of random quantum circuits, comprising performing a least mean squares minimization based on multiple expectation values, wherein each expectation value comprises an expectation value of a respective selected observable with respect to an output of an experimental implementation of a random quantum circuit corresponding to the respective selected observable; and processing the estimated polarization parameter values to obtain an estimate of the fidelity of the n-qubit quantum logic gate.


Find Patent Forward Citations

Castrillo, Sergio. (2025). Estimating the fidelity of quantum logic gates and quantum circuits (U.S. Patent No. 12511572). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12511572

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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