The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Apr. 16, 2021
Applicant:

Raytheon Company, Arlington, VA (US);

Inventors:

Vivian V. Huynh-Romine, El Segundo, CA (US);

John Mui, El Segundo, CA (US);

Howard K. Luu, El Segundo, CA (US);

Assignee:

Raytheon Company, Arlington, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 30/34 (2020.01);
U.S. Cl.
CPC ...
G06F 15/7867 (2013.01); G06F 15/7842 (2013.01); G06F 15/7871 (2013.01); G06F 15/7892 (2013.01); G06F 30/34 (2020.01);
Abstract

A field programmable gate array (FPGA) device including a configuration interface arranged to receive configuration data from an FPGA programmer. The FPGA device includes a plurality of random access memory (RAM) types, including a first RAM type and a second RAM type, arranged to store the configuration or image data. The FPGA device also includes a FIFO IP core arranged to implement a FIFO function in a plurality of different FPGA platforms. The FIFO IP core is: i) configured to implement the FIFO in the FPGA device based on the configuration data, and ii) configurable to store the configuration data in one or both of the first RAM type and the second RAM type.


Find Patent Forward Citations

Loading…