The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Mar. 10, 2025
Applicant:

Auradine, Inc., Santa Clara, CA (US);

Inventors:

Marshall Long, Sugarland, TX (US);

Sridhar Chirravuri, Sunnyvale, CA (US);

Zhenqiang Ye, Tracy, CA (US);

Sairam Jalakam Devarajulu, San Jose, CA (US);

Assignee:

Auradine, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/28 (2006.01);
U.S. Cl.
CPC ...
G06F 1/28 (2013.01);
Abstract

A system includes a plurality of computing devices. Each of the plurality of computing devices includes a plurality of integrated circuit (IC) chips configured to perform a common type of computation in parallel with one another. At least one of the plurality of computing devices is configured to: receive event data providing a target time of a power event, and a time interval; determine a random time within a time range, wherein the time range is based on the target time and the time interval; determine that a current time has reached the target time; and, based on determining that the current time has reached the target time, switch one or more of the plurality of IC chips corresponding to the computing device from a first power mode to a second power mode at the random time.


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