The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2025
Filed:
Aug. 31, 2021
Chengdu Boe Optoelectronics Technology Co., Ltd., Chengdu, CN;
Beijing Boe Technology Development Co., Ltd., Beijing, CN;
Hongjun Zhou, Beijing, CN;
Lili Du, Beijing, CN;
Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan, CN;
Beijing BOE Technology Development Co., Ltd., Beijing, CN;
Abstract
A display substrate () and a display device are provided. The display substrate () includes: a base substrate () including a display area (AA) and a peripheral area (PA); a plurality of sub-pixels (Px); a plurality of pins (), wherein orthographic projections of the plurality of pins () on the base substrate () extend in a first direction (AA') and distributed at intervals in a second direction (BB′) intersecting with the first direction (AA′); a plurality of leads () located in at least the peripheral area (PA), wherein the plurality of pins () are electrically connected to the plurality of sub-pixels (Px) through the plurality of leads (); a plurality of extension pads () located on a side of the plurality of pins () away from the display area (AA), wherein the plurality of extension pads () extend in the first direction and are distributed at intervals in the second direction, and the plurality of extension pads () are electrically connected to the plurality of pins (); and a plurality of spacers located between the plurality of extension pads () and extending in the first direction, wherein orthographic projections of the plurality of spacers on the base substrate () do not overlap orthographic projections of the plurality of extension pads () on the base substrate, and the plurality of spacers are configured to electrically insulate the plurality of extension pads () from each other.